Here is the abstract you requested from the DPC_2007_3D technical program page. This is the original abstract submitted by the author. Any changes to the technical content of the final manuscript published by IMAPS or the presentation that is given during the event is done by the author, not IMAPS.
|Market Trends for 3D Stacking|
|Keywords: TSV, Stacking, Market|
|Today, semiconductor chips have increased their performances while decreasing their size. But packaging must also takers into account all these new functionalities. We are at the crossroads where many 3D stacking is gaining more and more importance although many technical challenges must be overcome. This article will highlight the latest trends in advanced packaging, especially for 3D stacking. It will compare cost of the technologies and present market segmentation for 3D integration. 3D is the most “integrated” approach and is applicable to digital and mixed signal electronics, wireless, electro-optical, microelectromechanical systems (MEMS), sensors, smart imagers, displays, memories and other integration technologies. It is an enabling technology platform for high speed processors, low-power wireless products and many other applications, with the highest volume density of electronics/photonics components of any integration approach. Moreover, 3D stacking involves ICs processes which must be introduced simultaneously: • Wafer alignment • Wafer bonding • Wafer thinning • Inter-wafer interconnect Many of these technologies were originally developed for MEMS technology, and are now finding their application in 3D integration (such as DRIE). Although, there are still many technological challenges associated with stacking. Samsung’s announcement could really speed up the market adoption for this technology. In April 2006, Samsung Electronics Co. Ltd. has announced the development of a wafer-level stack package (WSP) of high density memory chips using laser-drilled through-silicon via (TSV) interconnection technology. 3D ICs is at the R&D stage in the largest IC companies today. This paper will present market motivations to move to 3D stacking/IC, a cost comparison of the TSV technologies and how these new technologies will change the industry chain of the semiconductor (FE vs. BE).|
|Dr. Eric Mounier, Project Manager - MEMS & Optoelectronics