Here is the abstract you requested from the DPC_2007_FlipChip technical program page. This is the original abstract submitted by the author. Any changes to the technical content of the final manuscript published by IMAPS or the presentation that is given during the event is done by the author, not IMAPS.
|The Increasing Role of Dielectric Films in Flip-Chip and Wafer Level Packaging|
|Keywords: Flip Chip, Wafer Level Packaging, Dielectric|
|The role of electronic packaging is taken less for granted by die and system designers these days and the role of the polymer films used in that packaging is also coming under scrutiny as product reliability becomes increasingly difficult to assure. There have been continuous improvements in the polymer materials used to underfill flip-chip die and the polymer films deposited on wafers as stress-buffer layers over the last couple of decades. The underfill adhesives became easier and faster to apply as well as having lower CTE properties to prevent cracking at solder ball joints. Wafer films became photosensitive and increased in elongation while maintaining mechanical strength at high solder reflow temperatures. Recent developments like low-k dielectrics, smaller features and larger dice have challenged the capability of underfill adhesives to satisfy multiple potential stress failure mechanisms. With the increasing use of re-distribution layers and multiple wafer level packaging interconnect layers, the requirements of deposited wafer films have changed accordingly. Additional requirements of these films include lower processing temperatures and more environmentally-friendly process chemistries. The new requirements and efforts to meet them with radically different materials and processes will be described for flip-chip underfills and wafer level packaging films. Directions for additional changes will be predicted for the next generation or two of devices.|
|Dr. Robert L. Hubbard, Director, Technology Development
Lambda Technologies, Inc.