Here is the abstract you requested from the IMAPS_2007 technical program page. This is the original abstract submitted by the author. Any changes to the technical content of the final manuscript published by IMAPS or the presentation that is given during the event is done by the author, not IMAPS.
|“Inside-Out” Fabrication of HDI Layers: Flush Pads With No Plating|
|Keywords: paste-filled microvia for HDI, parallel fabrication with colamination, inside-out strategy|
|A new fabrication method for HDI creates pads that are fully coplanar with the circuit layer. Vias are formed from the inside-out, or core-side to outer-surface, instead of from the outside-in. This “inside-out” concept eliminates electroless plating of vias and enables dimple-free pads to be formed from the same foil as the outer circuit layer. The concept is versatile and compatible with common circuit board materials and manufacturing practices. The HDI layers can be double-sided or single-sided HDI circuits fabricated in parallel with the core, prepreg-and-foil or resin-coated-foil constructions that are etched subsequent to lamination, or a combination. The key to the method is that vias are laser ablated either through the backside of a HDI circuit or RCF layer using the topside copper as a stop, or through a prepreg. A Mylar sheet is tack laminated to the drill-side of the surface prior to laser ablation. The result is a HDI or via layer affixed in perfect alignment to a disposable mask. Conductive paste is spread over the mask, the via holes are filled, the mask is stripped off, the layers are aligned, and the entire assembly is laminated under standard PCB lamination conditions. The conductive paste cures during the lamination cycle to form vias that are alloyed both throughout the bulk of the material and to the opposing pads. The cured via fill has a CTE of approximately 22 ppm/°C from 0°C to 300°C and will not melt during assemblyns. Key benefits of the technique include a true via-in-pad configuration, parallel manufacture of core and HDI layers, elimination of electroless plating of vias, protection of vias from subsequent etching operations, versatility in both materials selection and HDI layer counts, and completely planar pads. This paper will detail the specific materials, constructions, conditions and results that have been achieved.|
Ormet Circuits, Inc.
San Diego, CA