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Predictive Modeling of Diffusive Failure in Copper Wirebonded Packages
Keywords: copper wirebonding, package reliability, diffusion
The desire for lower-cost packages have led to the consideration of copper wire as an alternative to the widespread use of increasingly costly gold wire in flash memory packages. However, as has been discussed extensively in the literature, copper has a tendency towards electromigration under applied voltages. Therefore, the possibility of wire shorts is a significant concern of the copper wirebonding process. This paper assesses the likelihood of encountering diffusive failure in stacked chip-scale packages containing copper wire. The paper begins with a review of prior work in the literature on electromigration in general, and copper-related diffusion in particular. In addition to the many studies in the literature focused on copper diffusion from the metal layers of the die, we additionally leverage understanding of contaminant-induced diffusion to develop a semi-empirical model for predicting failure if copper wire were to be used in place of gold wire. Based on this model, we identify key control parameters (including wire diameter, bondpad pitch, bondpad opening, loop height, process temperature, package moisture content and overall copper volume in the package) which possess critical values beyond which copper diffusion may cause resistive shorts across wires. Additionally, we comment upon potential metallic defects in the copper atomic structure which may have been introduced prior to the assembly process, and estimate the variability or noise such uncertainty may introduce in the model. The paper concludes by inputting all these parameters into a process window which might be considered safe for copper wirebonding.
Amip J. Shah,
Intel Corporation
Folsom, CA

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