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0.3mm Pitch CSP/BGA Development for Mobile Terminals
Keywords: BGA, PWB, Board Assembly
With enhancing functionality requirements, mobile terminals are progressing toward integration. With the integration, I/O count of semiconductor device will be increasing and it will never stop. Simultaneously, the miniaturization of each device is increasingly important in order to make space for other devices for more functionality and to achieve final product to be thin and small. Naturally package size needs to be kept or shrunk with increasing I/O count. Therefore CSP/BGA will necessarily go for finer pitch, and 0.3mm pitch has been selected as next step. In case of WLCSP ASIP, fine pitch leads cost reduction since the cost is determined by package size. There are several process hurdles for 0.3mm pitch development, IC-substrate design rules, Ball attach, PWB design rules and Board assembly. Fine line / space and small via land will be required for both IC-substrate and PWB for fun-out. Ball attach process will be more difficult that 0.4mm pitch due to narrow space between pads. In board assembly process, paste release will be one of challenges from small aperture. Another process method is needed to evaluate. Also there are factors influencing each other, coplanarity, reflow warpage, ball height, Cu pad size / Solder mask opening of IC-substrate and PWB. Those interactive factors affect the board assembly yield. Board assembly process requires low coplanarity and low warpage in reflow oven. Ball height should be as high as possible while minimizing solder bridge risk, and it will make ball attach process more difficult. In addition, board level reliability, drop and temperature cycling are also concerns and must be verified since Cu pad size and solder mask opening is smaller than 0.4 / 0.5mm pitch. This paper will discuss overview of 0.3mm pitch development covering the description above.
Takayoshi Katahira, Research Specialist
Nokia Japan
Tokyo 153-0064,

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