Here is the abstract you requested from the IMAPS_2007 technical program page. This is the original abstract submitted by the author. Any changes to the technical content of the final manuscript published by IMAPS or the presentation that is given during the event is done by the author, not IMAPS.
|Stress Analysis of High Performance Flip-Chip BGA with Interposers|
|Keywords: HFCBGA, interposer, reliability|
|High performance flip-chip ball-grid-array (HFCBGA), a thermally enhanced FCBGA, is the composite package of FCBGA with a copper heat sink. This heat sink is used to extend the heat conduction area by connecting itself to the rear side of the silicon chip. However, this structure may introduce additional stress to the package and may damage the vulnerable tiny bumps although the underfill exists. In order to enhance the fatigue resistance of the bumps on package-level, we implement an additional substrate as interposer between package and board. This may reduce the mismatch of coefficient of thermal expansion between the substrate and interposer and eventually enhancing the bumps. However, there is no any evidence to prove its performance yet. In this study, we perform step-by-step finite element analyses on the package-level to board-level HFCBGA subjected different temperature loading as in manufacturing process. Six consecutive thermal stages have been considered: (1) solder bumps mount to the substrate, (2) underfill and thermal interface material (TIM) curing, (3) solder balls mount to the PCB, (4) underfill fills around solder balls and curing, (5) stiffener ring attaches and cure with adhesive, (6) finally solder balls reflow and package mount to the motherboard. Each stage contributes to the package-level or board-level warpage and solder bump stress is analyzed. Through this, two factors are studied: with and without stiffener ring on board, and underfilling around solder balls or implement corner bond at the interposer edge. Interested warpage are found and significantly affect the stress magnitude of bumps.|
|Yi-Shao Lai, Department Manager
Advanced Semiconductor Engineering, Inc.