Here is the abstract you requested from the IMAPS_2007 technical program page. This is the original abstract submitted by the author. Any changes to the technical content of the final manuscript published by IMAPS or the presentation that is given during the event is done by the author, not IMAPS.
|The Perfect ESD Storm|
|Keywords: ESD, CDM, Class 0|
|This paper describes “The Perfect ESD Storm” that is brewing in the electronics industry as well as the counter measures each company must take! CDM & Class 0 are Converging to Create a Violent ESD Storm and most companies are ill prepared! This is a result of the trend towards ultra-sensitive components (Class 0) and the wide spread lack of adequate CDM (Charged Device Model) understanding. The following questions will be answered with data and case studies. Is the Class 0 trend really happening this time? Is it likely to be a problem in your factory? How big a problem is CDM in manufacturing? What is different about CDM control procedures? How do I tailor S20.20 for CDM and Class 0? The CDM pulse is typically one nano second in duration with rise times in pico seconds. This contrasts sharply with the 160 nano second HBM pulse. As a result, manufacturing counter measures are substantially different and have only begun to come to light in recent years due to the growing percentage of CDM failures in the factory and field. Today approximately 95% of ESD failures are CDM and the control techniques are far from common knowledge. For instance, the ESD Association Standard S20.20 may be the best manufacturing control procedure available and, yet, the scope of the standard covers HBM procedures for device sensitivities above 100 volts. CDM and Class 0 procedures are not covered in the scope of the standard. This example is one of many that illustrate why most companies are ill prepared for CDM and Class 0 devices – “The Perfect ESD Storm”.|
|Ted Dangelmayer, President/CEO