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Board Level Assembly and Rework Assessment of a Multi-Row Leadless Package
Keywords: SMT Assembly & Rework, Leadless Package, Multi-row QFN
In recent years, Quad Flat No-lead (QFN) packages have gained rapid industry acceptance due to their compact size combined with superior electrical and thermal characteristics. Just as the industry becomes accustomed to the standard QFN devices, the need for higher performance leadless packages emerges. The thin substrate Chip Scale Package (tsCSP) is a leadless multi-row packaging solution that offers design flexibility and accommodates more I/Os than standard QFN devices. It also provides an isolated power/ground ring option for enhanced electrical characteristics. This paper will focus on the surface mount assembly aspect of this leadless package. It will provide guidelines for board level assembly and rework process, based on extensive surface mount experiments. Two different versions of the tsCSP package were considered for this evaluation (a 10mm, 3-row, 0.5mm pitch, 200 I/O tsCSP and a 15mm, 2-row, 0.5mm pitch, 208 I/O tsCSP). X-ray inspection and cross-section results were analyzed to understand the influence of various design and process parameters on solder joint standoff height and voiding. Both aqueous and no-clean lead-free solder paste chemistries were evaluated. Challenges and concerns related to cleaning underneath these low profile parts will also be discussed.
Sundar Sethuraman, Process Engineer
Solectron Corporation
Milpitas, CA

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