Here is the abstract you requested from the IMAPS_2007 technical program page. This is the original abstract submitted by the author. Any changes to the technical content of the final manuscript published by IMAPS or the presentation that is given during the event is done by the author, not IMAPS.
|Lead Free Interconnection Technology for Modern Packaging Application|
|Keywords: Lead Free, Packaging , Interconnection|
|The wafer level packaging industry has the constant demand to meet the latest industry requirements. Nowadays the wafer level packing industry is searching for technologies which fulfil critical demands, as there are: reduced package size, signal interconnection length and different functionality per package. In parallel the RoHS directives are restricting the use of the “dirty six” elements, having an impact on the use of solder able material for interconnections. As the miniaturization of interconnection technologies requires reduced geometrical and increased electrical demands on the signal path, the chip internal wiring with electrodeposited copper founds its way to the chip surface. Integrating electrodeposited copper for wafer level packaging provides several advantages, as there are: fine pitch application, effective signal transmission material, thermal stability and cost effective process. In parallel copper is not effected by the “lead free” directives and thus can be use as alternative interconnection material. The use of copper is providing an additional reduction of RoHS effected material in the package. The break through of copper as processing material for wafer level packaging application was established with the copper pillar technology. Meanwhile different applications and thus geometrical aspect ratios are challenging the formation of homogenous copper interconnects. Not only through silicon vias, also other different high aspect ratio copper through wafer interconnects need to be mechanical, chemical, micro structural and electrical characterized. The presentation given is providing the latest findings on chemical investigation and development work in order to show homogenous crystal growth in different application and aspect ratios, as the crystal structure and formation is indicating the conductor strength. Besides data and qualification results with industry recognized customers and institutes, this presentation will show the importance of diffusion layer influences, as not only the chemistry, the complete processing conditions (solution flow management) are contributing to the overall copper deposition performance. As the copper electro deposition is one of the main important factors for device reliability, this presentation is especially focusing on copper quality data, indicating the need for best copper crystal growth.|
|Tom Thieme , Product Manager
ATOTECH Wafer Technology