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Copper Electroplating Process for Passive Si-Based System in Package Applications
Keywords: Copper electroplating, SIP technology, Inductors
NXP has been involved these last years in PICS technology (Passive Integrated Connective Substrate) for passive components such as high-density capacitors, inductors and resistors. In order to improve the electrical characteristics of these devices and more particularly of inductors, top aluminum metal can be replaced by a thick copper layer. This paper will describe a study concerning a micromolding copper process for these PICS substrates. High deposition rate (1 µm/min), thickness distribution and uniform electrical characteristics (close to bulk values) are the main challenges for the industrial deposition process. We used two sets of electrolyte (sulphate bathes) with organic additives. Additives consumption and degradation have been carefully monitored using CVS (Cyclic Voltammetric Stripping) and TOC (Total Of Compounds) analysis. A wide range of current density (2 to 5 A/dm2) was used to optimise the process. Copper deposition was performed on various pattern geometries representative of our products. For the two types of electrolyte, the wafer uniformity is as targeted (< 5%) but differences are observed for the within die uniformity (up to 1.5µm depending on the design). In the selected range of current density, the growth rate is below expectations. Both chemistries lead to low surface roughness (<25nm) for all current densities evaluated. Copper line profile is flat in one case and curved on the other one; this curved profile can have a negative impact for some applications. The electrical resistivity varies from 1.7 µ to 2.3 µ Finally, the process developed fulfills the main technical requirements (thickness uniformity, low roughness, good electrical performances…) but strong differences in bath management and additive consumptions have allowed to select one of the electrolyte for our applications.
Laetitia Hamelin, Ph.D Student
NXP Semiconductors
CAEN 14079,

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