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Fabrication and Electrical Performance of Z-Axis Interconnections: An Application of Nano-Micro-Filled Conducting Adhesives
Keywords: Z-axis Interconnections, Nano-Micro-Filled Conducting Adhesives , Electrical Performance
Greater I/O density at the die level, coupled with more demanding performance requirements, is driving the need for improved wiring density and a concomitant reduction in feature sizes for electronic packages. Alternatives to the traditional plated through hole are required for high frequency and high density interconnect applications. One method of extending wiring density is a strategy that allows for metal-to-metal z-axis interconnection of subcomposites during lamination to form a composite structure. There has been increasing interest in using electrically conductive adhesives as interconnecting materials in the electronics industry. Conductive adhesives are composites of polymer resin and conductive fillers. Metal–to-metal bonding between conductive fillers provides electrical conductivity, whereas a polymer resin provides better processability and mechanical robustness. Conductive adhesives have been used to fill vias in subcomposite structures, and form conductive joints to metal planes during lamination to adjoining circuitized cores. Typically, adhesives formulated using controlled-sized micro particles have been used to fill small diameter holes for Z-interconnect applications. In the present study, micro-filled adhesives were modified to improve overall electrical, mechanical, and reliability performance. Nanoparticles were mixed with micro-particles to improve sintering behavior of the adhesives. It is well known that change in grain size has a direct impact on the electronic properties of a system. In view of this, a systematic investigation of electrical resistance behavior of silver nanocomposites has been carried out. A variety of nanoparticles ranging from 10 nm to 80 nm was used to modify micro adhesive composites. Particle size has a direct impact on particle diffusion/sintering. SEM images indicate that sintering of a nano-micro system containing 10-15 nm particles starts at 200 degree C whereas 80 nm particles show sintering around 275 degree C. Addition of in-situ nanoparticles reduces sintering temperature without compromising electrical conductivity. A variety of metals including Cu, Ag and LMP have been used to make the conductive adhesives. Adhesives were characterized by SEM and optical microscopy to ascertain particle dispersion and interconnection mechanisms. A Keithley micro-ohmmeter was used for electrical characterization. Adhesives exhibited volume resistivity ranging from 10-4 ohm-cm to 10-6 ohm-cm depending on composition, particle size, and loading of the adhesives. It was found that with increasing curing temperature, the volume resistivity decreased due to sintering of metal particles. A few optimized metal-epoxy adhesives were used for hole fill applications to fabricate Z-axis interconnections in laminates. Conductive joints were formed during composite lamination using an electrically conductive adhesive. Z-axis interconnection was achieved using joining cores. Through holes in the joining cores, formed by laser or mechanical drilling and having diameters ranging from 50 microns to 250 microns, were filled with an optimized electrically conductive adhesive. The adhesive-filled joining cores were laminated with circuitized subcomposites to produce a composite structure. High temperature/pressure lamination was used to cure the adhesive in the composite and provide Z-interconnection among the circuitized subcomposites. As a case study, we have designed and built a circuit board test vehicle (TV) to make new RF structures, using Z-axis interconnection (Z-interconnect) building blocks. A typical 50-ohm stripline was designed with a ground-signal-ground structure. The stack-up had 23 metal layers, including 5 0S1P joining cores and 6 2S1P signals cores. Teflon-based Taconic materials TPG30 and TLG30 were used for the dielectric layers. Laminated conducting joints show low resistance in the range of 5-12 milliohm per joint. Electrically, S-parameter measurements showed very low loss at multi-gigahertz frequencies. The losses were low enough to support typical SERDES up to 25 Gbps over 30 inches. This effort is an integrated approach on three fronts: materials development and characterization, fabrication, and design and electrical characterization at the board level.
Voya Markovich, Sr. VP and CTO
Endicott Interconnect Technologies, Inc.
Endicott, NY
USA


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