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Wirebondability and Solderability of NiAu Electroless Metallizations Subjected to High Temperature Process Flows
Keywords: electroless, wirebondability, solderability
In this work we analyze the wirebondability and solderability of different electro-less metallization on Silicon wafers after exposure high temperatures of the assembly process flow. We also propose a solution that allows the wafers to be subjected to high temperature thermal budgets keeping good solderable and wirebondable characteristics. To have a solderable and reliable topside metallization in Silicon wafers is becoming a very desirable characteristic in many high power application microelectronics devices. This allows, during the assembly process, to solder the Si die to high cross section, high conductivity interconnects. This technology enables power devices in general to have extremely high current ratings, low parasitic resistance and excellent thermal performance. The challenge is that the process flow of the wafers after electro-less plating process sometimes involve a anneal step (for contact resistance optimizations for example) and the solder reflow itself. This repeated exposure to high temperature constitutes a challenge for NiAu based electro-less process due to the diffusion of barrier metal layers (Ni in general) to the top surface. These metals that diffused to the surface oxidize and dramatically reduce the solderability and wirebondability of the bond pads. In this work we experiment with different stacks of electroless plated metallization over Silicon wafers and study the impact of different thermal budgets to the solderability and wirebondability of the final surface. We finally propose a solution for this problem.
Juan A. Herbsommer, Technical Manager
Ciclon Semiconductors
Bethlehem, PA

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