Here is the abstract you requested from the DPC_2009_3D technical program page. This is the original abstract submitted by the author. Any changes to the technical content of the final manuscript published by IMAPS or the presentation that is given during the event is done by the author, not IMAPS.
|Electrical Characterization of High Count, 10 µm Pitch, Room-Temperature Vertical Interconnections|
|Keywords: Vertical, Interconnect, 3D|
|In order to increase the format of heterogeneous staring area arrays to 2K*2K pixels or even larger complexities, limited substrate size and cost reduction considerations make mandatory the reduction of the pixel size, but the mastering of ultra-fine pitch and high count flip chip bonding technology represents a challenge . To overcome the planarity and thermal mismatch issues while reducing the bonding thermo-compression forces, a new room-temperature insertion technology has been proposed and developed . This study gives first measured interconnection yield and serial access resistance of 2Kx2K, 10µm pitch hybridized arrays fabricated using the proposed flip-chip technique, connection results are discussed (access resistance, connection yield). A comparative study proves that parallelism during insertion is a key parameter and that, provided a perfect parallelism control is insured, the µtube insertion technique is scalable to complexities of over four million connections, with pixel pitches down to 5µm and even less. Hence, a low temperature dedicated insertion concept could possibly be applied to 3D interstrata interconnections to help solve the cumulative high temperature cycles issues encountered when using more conventional high temperature processes. : L. Kozlowski Progress in Ultra-Low Noise Hybrid and Monolithic FPAs for Visible and Infrared- Astrophysics and Space -Science Library- vol. 300 pp123-130 : D. Saint-Patrice, F. Marion and all. New Reflow Soldering and Tip in Buried Box (TB2) Techniques For Ultrafine Pitch Megapixels Imaging Array Proceedings Orlando FL2008 Electronic Components and Technology Conference pp 46-53.|
|Francois Marion, Senior Expert
CEA, LETI, MINATEC