Here is the abstract you requested from the DPC_2009_3D technical program page. This is the original abstract submitted by the author. Any changes to the technical content of the final manuscript published by IMAPS or the presentation that is given during the event is done by the author, not IMAPS.
|Enabling Through Silicon Vias with Co-Designed Materials|
|Keywords: TSV, Bosch, #D|
|The migration of electronic devices to become smaller, lower cost with more functionality is requiring innovative 3-D packaging approaches. Through silicon vias (TSV) is a packaging method, which bonds two or more die together in an integrated structure improving functionality, performance, power consumption, thermal properties and with reduced board real estate. There are two different methods of forming TSV- via first and via last depending on whether the via is made before or after wafer processing. Regardless of the via formation process, an imaging process that enables the formation of high aspect interconnects is a major challenge. New formulations for dry film, post etch residue removal and photoresist removal have been jointly developed by DuPont Wafer Level Packaging Solutions to enable TSVs for 3-D Packaging. This paper describes the compatibility, residue removal and stripping performance achieved with innovative cleaning technology on industry representative TSV wafers created by the Bosch process.|
DuPont WLP Solutions