Here is the abstract you requested from the DPC_2009_3D technical program page. This is the original abstract submitted by the author. Any changes to the technical content of the final manuscript published by IMAPS or the presentation that is given during the event is done by the author, not IMAPS.
|Next Generation Package on Package (PoP) Platform with Through Mold Via (TMV) Interconnection Technology|
|Keywords: Stacked package (PoP), Application and system requirements, Vertical interconnects|
|Amkor's next generation PoP technology using through mold vias (TMV) was introduced at ECTC 2008, followed by a joint stacking and board level reliability paper with SonyEricsson at SMTAI Aug 2008. This paper will outline the system, processor and memory architecture requirements for next generation PoP stacks: comparing the benefits TMV provides over existing bottom PoP technologies. Provide data for the design rule and warpage control benefits of the TMV technology which allows smaller, thinner, flatter - higher density PoP stacks to be robust for high volume manufacturing. Report the package and board level reliability testing of the TMV technology against industry requirements. Provide a summary of the JEDEC standards in development for next generation PoP applications including the mechanical and electrical interface requirements driven by low power double data rate (DDR) 2 memory in single and dual channel architectures with a summary of additional development work in the TMV allowing the technology to scale for future applications requiring stacked interconnect densities down to 0.3mm pitch in multiple row ball array configurations.|
|Curtis Zwenger, Sr. Director Package Development