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High-Quality LTCC Solenoid Inductor Using Air Cavity on Silicon Wafer for 3D Integrated Circuit
Keywords: Solenoid inductor, Air Cavity, LTCC
Recently, many works for high Q-factor inductor are proposed using system-on-chip (SoC) and system-in-package (SiP) technologies. The inductor for SoC has a low Q-factor due to the loss of the silicon substrate. The low-temperature co-fired ceramic (LTCC) technology enables the high Q-factor inductor as compared with the silicon on-chip inductor using relatively thick metal layer having low resistance and is suitable for the SiP. In this paper, a high quality LTCC Solenoid Inductor using the air cavity on silicon wafer for three-dimensional (3-D) integrated circuit (IC) is proposed. The multilayer solenoid inductor is attached using solder or gold stud bumps on a silicon wafer with an air cavity structure. The air cavity is formed on a silicon wafer through a trench process and is able to isolate the substrate losses which equivalent to a low k material effect. The electrical coupling between the metal layer and the dielectric layer is decreased by adopting the air cavity process. To improve the quality factor of the inductor, we have investigated the LTCC dielectric effect compared to the conventional LTCC solenoid inductor. The LTCC solenoid inductor using the air cavity on silicon wafer has an improved Q factor and self-resonant frequency by reducing the parasitic capacitance. Also, 3-D device stacking technologies provide an effective path to the miniaturization of electronic systems. The high quality solenoid inductor is firstly adopted the air cavity on silicon wafer using LTCC technology and enables 3-D stacking for the high Q-factor off-chip inductor.
Hyun-Cheol Bae, Senior Member of Engineering Staff
Electronics and Telecommunications Research Institute
Daejeon 305-700,
South Korea


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