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Novel Packaging Via Solder Joints at Chip Edges
Keywords: multi-chip-modules, DRIE, backside grinding
Quilt Packaging is a newly developed device packaging technique that interconnects two or more chips in a lateral manner through their edges by solder-joint nodules. These solder joint nodules are created using accepted microfabrication technologies. Deep reactive ion etching (DRIE) with the Bosch process is used to create the nodule molds; a single damascene process is used to form the nodules. The Cu nodules are capped with solder by an electroless plating process. This report reviews our recent progress in the Quilt Packaging technology development in the Electrical Engineering Department at the University of Notre Dame. In this newly developed process, we introduce a thin film metal as a DRIE hard mask for die separation. In our modified dice-before-grind process, backside grinding is employed after partial etch by DRIE for die separation. The importance of this grinding step used in this packaging process is that the chips can be ground to a uniform thickness, which facilitates alignment along their edges in the vertical plane. A high-accuracy flip-chip die bonder is used to align the chips along their edges. Solder reflow completes the fabrication of the multi-chip “quilt” of ICs. Since two or more chips are joined at their edges, this technology is promising as an alternative for, or modification of, multi-chip-modules (MCM) and other high-speed, high-density assemblies. The nodules serve as short interchip interconnect wires, and as a result, potential applications in high-speed communications, supercomputing and vision-sensing are especially promising.
Cai Liang, Postdoctoral Research Associate
University of Notre Dame
Notre Dame , IN

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