Here is the abstract you requested from the HiTEN_2009 technical program page. This is the original abstract submitted by the author. Any changes to the technical content of the final manuscript published by IMAPS or the presentation that is given during the event is done by the author, not IMAPS.
|Architecture Analysis of High Performance Capacitors|
|Keywords: Capacitor , Architecture, Modeling and Simulation|
|Evolutionary increases in the power density of the electrical systems has resulted in the next generation of compact, high power electrical systems requiring efficient high voltage power electronics that are stable over an increasing range of temperature (-55 °C to 250 °C). In particular, there is a need to investigate capacitive device architectures as a means to compliment recent advances in SiC power modules, high temperature inductors, and thermally robust insulation materials. These electrical components have enabled the development of compact, high switch rate power system components that can operate at temperatures > 200 °C, but have been limited by current capacitor technology. Of concern with current state of the art capacitors are their volumetric energy density, dissipation factor, thermal stability, parasitic inductance, and failure mechanism. A modeling and simulation capability will be described herein, which was used to investigate the device architecture—electrical performance relationship for wound, collapsed, and stacked devices. Initially, a mathematical model is developed and utilized for both equivalent capacitor circuit analysis and device architecture field analysis, which are used to identify factors (e.g., electrode, dielectric, contacts, etc.) that affect ESR, ESL, and capacitance. Further characterization of the device architectures is conducted with mapping of the electric fields, magnetic fields, and thermal profile via finite element method software. The understanding developed for the device architecture and resultant electrical properties is then utilized as input parameters to evaluate the performance of different capacitors in a capacitor-focused SPICE simulation for a dc-dc boost converter. The understanding developed from this study may provide insight into designing a packaged capacitor with optimized voltage, current, DF, and frequency for a designated application. In addition, the modeling/simulation may be useful to investigate the failure mechanism and real operating temperature of different capacitor technologies.|
|Jeffery T. Stricker, Program Manager, Capacitor R&D
US Air Force Research Laboratory
Wright-Patterson AFB, OH