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|Indium Thermal Interface Material Assembly Manufacturability and Reliability|
|Keywords: TIM, indium, reliability|
|As microprocessor silicon technology advances, heat density increases. This poses a major challenge for conventional microprocessor packages with organic thermal interface material (TIM) to transport heat from the core of the microprocessor to an external heat sink. Therefore, solder-TIM -- in particular, indium-TIM, with much higher thermal conductivity than organic TIM -- is the solution for many high-power (and high power-density) microprocessors. Indium is chosen mainly because of its compliant property to meet thermo-mechanical requirements for microprocessor packages, relatively low melting point for assembly manufacturability, and it is lead-free. At room temperature, indium is already at very high homologous temperature and does not work-harden. Re-crystallization happens readily, relieving most stresses that develop at the interface. However, bonding silicon to an external copper lid with a solder requires extensive process development. This includes silicon metallization development, metallization of the lid cavity, extensive assembly process development to ensure good control in TIM bond line thickness, minimal void at the interface, and the metallic bonding meeting all relevant reliability tests. Among many reliability tests preformed to ensure product field life, high-temperature storage test (HTS) is critical. Therefore, a comprehensive HTS test was conducted to study its impact on thermal, inter-metallic compound (IMC) formation and growth, voids, and stability of bond line thickness (BLT). Two indium-TIM attachment methods were studied: pre-attached indium approach and indium preform approach. Pre-attach refers to pre-attaching indium-TIM on a lid cavity prior to assembling lid/indium with the microprocessor package, whereas indium preform refers to bonding indium preform to lid and silicon concurrently. High-temperature storage was conducted on thermal test vehicles (TTV) built with indium-TIM1 so thermal resistance can be measured at each read point of HTS. Research found no significant change of thermal resistance up to 1,000 hours of HTS at 125°C. C-SAM was used to monitor structural change in indium, such as void sizes. There is no significant change in voids after 1,000 hours of HTS. SEM and TEM were used to study IMC formation at each HTS read point. Two types of IMC were identified: AuIn2 and In27Ni10. This research found that IMC thickness at the indium/silicon interface is very stable and does not increase with HTS time. However, significant IMC thickness increase is observed at the lid/indium interface. This observation can be explained by the nickel layer thickness used in the lid cavity and silicon backside. However, the increase of IMC at the lid/indium interface does not result in any thermal degradation or reliability degradation. This study concludes that indium-TIM is stable under HTS test.|
|Sean S. Too, Senior Member of Technical Staff