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Electromigration Study of PILR Platform for Fine-Pitch Flip Chip Interconnects
Keywords: Electromigration, Reliability, uPILR flip-chip
The capability of high-performance devices to carry high currents at elevated temperatures for extended periods of time is typically met by flip-chip interconnects. Current values in these devices run as high as many hundreds of milli-Amperes, which translates to about 10,000 A/cm2. The result of this high current density shortens the lifetime of the interconnects, which is caused by the acceleration of diffusion or migration of metals and creating voids, and this phenomenon is called electromigration. Different solutions are being implemented by the industry to address this concern. Some of these include: the UBM structure, adding barrier layers, changing the composition of solder, etc. This paper will discuss the evaluation methodology for interconnect electromigration performance. To characterize the performance of the interconnect and the package, two test vehicles were considered. The first one consists of a series of interconnects on a substrate with different parameters. These were used to determine the diffusion rates within the interconnects themselves. For the package level testing, a test vehicle was built with a die size of 18x20x0.75mm, which was packaged on a substrate measuring 40x40x1.24mm. The package has more than 10,000 flip-chip interconnects with a minimum pitch of 0.150mm, and a maximum pitch of 0.200mm pitch. The chip has 0.090mm diameter Sn/2.5Ag solder bumps attached to it. PILR interconnects are present over the substrate pads with solder mask opening of 0.090mm. The packages were tested under different temperatures and current densities. Results show that by redesigning the interconnects, electromigration performance can be improved. In conclusion, a fine-pitch interconnect structure will be presented that offers high electromigration performance. Experimental results show more than 1000 hours of lifetime at a current value of 1A and chip temperature of 150 0C for the 0.15mm pitch PILR flip-chip package.
Piyush Savalia, Engineer
Tessera
San Jose, CA


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