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|Embedded Actives and Passives in Low-Profile Organic Packages Using Chip-Last Assembly|
|Keywords: Chip-Last, Embedded, Organic|
|Embedded actives and passives are being pursued by chip-first and wafer-level fan-out approaches to address ultra-fine pitch and short interconnections needs of ultra-low k 32nm ICs and beyond. An alternative option by “chip-last” embedding has been demonstrated at Georgia Tech with all the benefits of chip-first without its detriments for manufacturing infrastructure. This research presents detailed results from the first demonstration of this novel technology called Embedded MEMS, Actives and Passives (EMAP) with Chip-Last (CL) interconnections. This technology is targeted at highly integrated modules and systems with multiple 2D and 3D ICs for RF, Digital, Analog, MEMS and passive devices, all in a single package or module. Ultra-thin silicon test dies (55µm thick) were embedded in a 60µm deep cavity of 6-metal layer substrates with total thickness of 0.22mm. The robustness of substrate materials and processes was demonstrated using thermal cycling during which greater than 99% of the blind-vias and through- holes passed the tests. The embedded IC is interconnected to the substrate by ultra-fine pitch (30-50µm) and low-profile (10-15µm) Cu-to-Cu interconnections, bonded using polymer adhesives. Two different die-sizes 3mm x 3mm and 7mm x 7mm were tested to investigate the reliability performance of these interconnections. This interconnection process was performed at 180°C, has passed 1000 thermal shock cycles in reliability testing, in addition to passing Highly Accelerated Stress Test (HAST) and High Temperature Storage Test (HTS). This research addresses the critical need for embedding ICs in various substrate materials- RXP, FR-4 and low CTE cores by chip-last assembly while meeting the I/O and ultra-low k reliability requirements at first level interconnections. In addition, chip-last technology enables assembly of chips with multiple pad metallization schemes and thicknesses because of its unique process flow. Comprehensive analysis of new materials and processes used in the chip-last embedding technology has been carried out demonstrating the advantages and robustness of this promising technology. Due to manufacturing process- simplicity and unparalleled set of benefits, the chip-last technology described in this paper provides the benefits of chip-first without its disadvantages and thus enable highly miniaturized, multi-band, high performance modules with 3D ICs or packages with embedded actives, passives and MEMS devices.|
|Nitesh Kumbhat, Engineer
Georgia Institute of Technology, Packaging Research Center