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Fabrication of Tall Structures for Microelectronics Application Using Selective Electrodeposition Process
Keywords: Selective Electrodeposition, LIGA, Bump plating
Fabrication of tall features using selective electrodeposition is well know process and has several applications in microelectronics packaging. The use of conventional exposure and development processes is limited by the aspect ratio and sizes of the features obtained. This paper describes a novel approach to fabricated nearly vertical small sized features using thick photoresist JSR THB-151-N. A hot embossing tool made of copper was fabricated using this process which has feature size as small as 50 µm with height of 50 µm. This hot embossing tool was used to fabricate trenches in a polymeric substrate which were filled with an electrically conductive polymer thick film to form electrical interconnects. Also presented are results from experiments performed to fabricate tall silver pillars with nearly vertical walls on bare dies to form interconnects.
Bernd Scholz,
North Dakota State University
Fargo, ND

  • Amkor
  • ASE
  • Canon
  • Corning
  • EMD Performance Materials
  • Honeywell
  • Indium
  • Kester
  • Kyocera America
  • Master Bond
  • Micro Systems Technologies
  • MRSI
  • Palomar
  • Promex
  • Qualcomm
  • Quik-Pak
  • Raytheon
  • Rochester Electronics
  • Specialty Coating Systems
  • Spectrum Semiconductor Materials
  • Technic