Abstract Preview

Here is the abstract you requested from the IMAPS_2010 technical program page. This is the original abstract submitted by the author. Any changes to the technical content of the final manuscript published by IMAPS or the presentation that is given during the event is done by the author, not IMAPS.

Statistical Analysis Approach to Improve the High Speed Signal Quality by Including the Manufacturing Process Variations of Printed Circuit Boards
Keywords: Signal Integrity, Statistical Analysis, Process Variations
Data rates of the serial I/O interfaces continue to increase into the Gbps frequency range. Many techniques have been developed to overcome the high speed data transmission problems in Gigabit systems. However printed circuit board (PCB) design continues to face numerous obstacles for high data rate interfaces. One of the major problems has to do with the difficulty in quantifying and including the impact of PCB process variations which has a direct impact on signal quality. The inclusion of PCB manufacturing process variations will increase the design complexity many folds, because many parameters are varied resulting in additional number of setups and simulations. If there are 13 parameters (dielectric thickness, pad size, drill location, etc) and each parameter has 3 numbers (minimum, nominal and maximum tolerance), the permutation is 3 to the power 13. There are a total of 1,594,323 designs of experiments (DOE). It is very time consuming and difficult to isolate and identify the worst condition and its distribution. Correlation between simulations and measurements is crucial but not always practical due to the process variation and the limited sample size typically available in early prototype efforts. A more effective way to consider the impact of the process variation is needed. In this paper, we propose a statistical analysis approach to consider the contributions across wide process variation permutations. The methodology is applied to a chip-to-connector high speed differential channel design for a multi-layer PCB. In addition, the contribution factor of each process variation parameter can be determined by the use of a sensitivity analysis. The DOE can be significantly reduced by over 50,000X using the Taguchi method reduction to 27. Finally, we acquire the contribution factors of each process variation parameters and probability distribution function of differential impedance, insertion loss, return loss and mode-conversion. And +/- 3 sigma impedance values were calculated and +/- 3 sigma s-parameters are plotted. From these results, we can increase the confidence level of correlation between simulation and measurement because the proposed approach let us know the trend of variation of impedance and s-parameter by process variation.
Seungyong Baek,
Cisco Systems
San Jose, CA

  • Amkor
  • ASE
  • Canon
  • Corning
  • EMD Performance Materials
  • Honeywell
  • Indium
  • Kester
  • Kyocera America
  • Master Bond
  • Micro Systems Technologies
  • MRSI
  • Palomar
  • Promex
  • Qualcomm
  • Quik-Pak
  • Raytheon
  • Rochester Electronics
  • Specialty Coating Systems
  • Spectrum Semiconductor Materials
  • Technic