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Fine Pitch 3D Dispensable Electrical Interconnects for System in Package Solutions
Keywords: SIP, Inteconnects, 3D
The use of dispensable conductive materials to create fine pitch 3D electrical interconnects has been proven by Vertical Circuits Inc. as a low cost, high reliability alternative to create System in Package (SIP) solutions. This paper discusses the benefits of dispensing the 3D electrical interconnects instead of using traditional wire bond or high cost TSV processes to create a System in Package. Pad pitches achieved are typically less than 65um. A conformal coating of a dielectric material with the subsequent selective laser ablation of the dielectric over the die pads allows all interconnect lines to be dispensed in a single application adjacent to each other. Compared to traditional wire bond applications, the overall interconnect inductance is lower with comparable capacitive and resistance values enabling higher frequencies to be achieved. Using this process, complex multi-step stacking and bonding applications that jeopardize known good die (KGD) and increase the XY footprint of the System in Package are eliminated. Furthermore, the entire die stacking process can be executed as a single step before the application of the electrical interconnect material. This method minimizes the overall material handling and repetitive die stack processes that increase the probability of defects leading to expensive yield losses. Methods for matching the Coefficient of Thermal Expansion (CTE) for the stacked components within a System in Package will be demonstrated as well as surface treatments to enable fine pitch dispense that result in increased product reliability. JEDEC L3 reliability data will be presented to demonstrate SIP robustness using this technology.
Jeff S. Leal, Principal Engineer
Vertical Circuits, Inc.
Scotts Valley, CA
USA


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