Here is the abstract you requested from the IMAPS_2010 technical program page. This is the original abstract submitted by the author. Any changes to the technical content of the final manuscript published by IMAPS or the presentation that is given during the event is done by the author, not IMAPS.
|A New Coreless Substrate Technology|
|Keywords: coreless substrates, stud and pattern plating, prepreg dielectrics|
|Coreless substrate technology has been viewed as the holy grail of organic substrates for a long time. The benefit of this substrate concept is to reach the same level of wireability as in multi-layer ceramic substrates at lower cost and better electrical performance. Most approaches to date were based on amterials like ABF or other resin systems with little reinforcement which resulted in substrates which were very prone to warping before die assembly and even more so after die attach. Here, the approach is to pattern plate the circuit pattern on a temporary carrier. In a second step, studs are plated for the future via interconnections. In a third step, predrilled prepreg is laminated over the prior structures. If a copper foil is included in the lamaintion step then the studs are accessed with etching openings in the copper foil and cleaning the top of the pillars to allow a plated connection in a pattern plating process. By repeating the appropriate steps of above on this substructure, a multi-layer coreless substrate can be built. The strength is equivalent to PBGA type susbtrates of equivalent thickness. Process variations are possible and will be illustrated.|
|Bend K. Appelt, Dir WW Business Development
ASE Group Inc.
Santa Clara, CA