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Advances in Carrier Technologies for WLP and TSV Stacking
Keywords: TSV stacking, Fan-out WLP, Temporary bonding and debonding
Wafer-level packaging and TSV stacking usually require a significant reduction in wafer thickness. An increasing number of applications take advantage of a reduced bulk silicon thickness. When combined with a large diameter wafer, making reliable packaging and interconnects necessitates new wafer handling mechanisms. The most promising and widely investigated handling solution is by using temporary bonding and debonding techniques with a carrier wafer. Two main handling schemes can be proposed for WLP and TSV stacking; (a) bonding and debonding with a spin-on adhesive and (b) tape lamination and subsequent delamination with a dry-film tape. For TSV stacking applications, thermoplastic adhesives with high temperature stability are typically used due to subsequent high-temperature processes. Once a device wafer is temporarily bonded to a carrier wafer, it is ready for backside processing. After backside processes are finished, the device wafer can be debonded from the carrier wafer and then proceed to final packaging processes. Either slide lift-off debond at 180-200 C or edge zone release at room temperature can be chosen depending upon process flow and thermal budget. Successful demonstrations with CIS, memory, logic and MEMS wafers have been performed in regards to process stability and electrical performances. Fan-out WLP needs a carrier technology based on laminated tapes, where a carrier wafer is laminated with a double-sided adhesive tape before pick-and-place of KGDs. Key technical features in this lamination and delamination method include (a) tape punching with no residues, (b) pyramidal structure formation of device, tape and carrier, (c) optically aligned lamination, and (d) low stress wedge lift-off delamination. All details on those methods will be presented at the conference.
Thorsten Matthias, Head of Business Development
EV Group
St. Florian/Inn 4782,
Austria


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