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High Power Module Packaging Design for Harsh Environments
Keywords: Advanced packaging materials, High power and temperature, SiC power transistor
Utilization of high temperature capable silicon carbide (SiC) transistors enables the use of active electronics in high temperature regions which has not been reachable with traditional transistors made of silicon. One of the main challenges for packaging power semiconductors are high currents associated with large amounts of dissipated heat at the junction and die attach. This results in large thermo-mechanical stresses between the active chip and the substrate due to a mismatch in the coefficient of thermal expansion (CTE). Higher temperatures also lead to higher interdiffusion rates between the bond metals. These two effects combined with a high ambient temperature considerably limit the acceptable temperature rise from ambient to the junction of the transistor. E.g. the ambient temperature can reach more than 200°C in downhole applications. This calls for a thermally efficient packaging design. The CTE mismatch of the presented system is minimized to reduce stress, and thermal conductivity has been optimized to reduce thermal gradients and lower the thermal resistance to assure long term reliability. By combining advanced packaging materials such as SiC reinforced aluminum (AlSiC), plated with copper, as substrate, and advanced thermal interface materials such as AlNi based nano foils for the die attach, the thermal design was significantly improved compared to standard solutions. The system also includes an efficient heat path for heat transfer to the ambient environment, by adding convective surface cooling using a fluorinate liquid. The fluorinate liquid also act as an electrical passivation for the system. This paper presents the outline of the concept design and how the design benefits from use of advanced materials for the packaging solution. It also presents an investigation of the thermal performance of the system. Results from thermal−flow modeling with convective cooling, using finite element analysis, is presented.
Andreas Larsson, Research Scientist
SINTEF ICT
Oslo 0373,
Norway


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