Here is the abstract you requested from the DPC_2011 technical program page. This is the original abstract submitted by the author. Any changes to the technical content of the final manuscript published by IMAPS or the presentation that is given during the event is done by the author, not IMAPS.
|300mm Wafer-Level Image Sensor Packaging|
|Keywords: Image sensor packaging, Wafer Level Packaging, Heterogenous integration|
|The image sensor market is still showing s tremendous market growth due to applications in consumer electronics, medical, automotive and communication. For a lot of new applications the image sensor packaging is in fact the enabling key technology. The introduction of wafer level packaging a couple of years ago allowed the cost reduction necessary for high volume consumer electronics. Innovative packaging concepts with TSVs and thin dies enable unmatched form factor. Currently scaling image sensor manufacturing and packaging to 300mm is the next big step forward in cost reduction. Wafer level image sensor packaging requires capping of the sensor wafer with a glass wafer. This heterogeneous integration of silicon and glass results in a variety of challenges like thermal expansion mismatch and bow and warp of the wafer stack. In this paper Tessera's OptiML Micro Via Pad technology for image sensors will be described with a special emphasis on equipment and process technology. Wafer encapsulation, via formation, electrical routing, passivation and solder bumping will be discussed.|
|Thorsten Matthias, Director of Business Development
St. Florian/Inn 4782,