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3D-IC Integration Using C2C or C2W Alignment Schemes Together with Local Oxide Reduction
Keywords: Flip Chip, Chip to Chip, Chip to Wafer, Oxide removal
3-Dimensional interconnection of high density integrated circuits enables building devices with greater functionality with higher performances in a smaller space. This paper explores the chip-to-chip and chip-to-wafer alignment and the associated bonding techniques such as in-situ reflow or thermocompression with a local oxide reduction which contributes to higher yield together with reduction of the force or temperature requirements.
Gilbert Lecarpentier, Product Manager
SET - Smart Equipment Technology
Saint Jeoire, BP24 Haute Savoie 74490,
France


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