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Ultrathin WLP Die Embedded Polyimide Multi-Layer Wiring Board
Keywords: Embedded Die Packaging, Fan-out Array Packaging, Embedded Die SiP
We have developed an ultrathin IC-embedded polyimide multi-layer wiring board utilizing a wafer level packaging (WLP) technology. The IC die is wafer level packaged with no solder bump (i.e. just copper land), thinned less than 100 micron and then sandwiched between multi-layer printed wiring boards composed of thin polyimide films with the thickness of several tens of microns used in standard flex boards. Therefore, the realized embedded board has a very thin structure, e.g. the thickness of a 4 layers board with 1 die embedded is 220 micron. For the electrical connection between circuit layers including redistribution layer of the embedded die, the means employed in our standard wiring board process is applied. The electrical connection is made by the conductive paste, which consists of several kinds of metal filler and resin adhesive and makes alloy between copper of circuit layer thorough pressing and heating processes. The alloying feature of the paste assures the robustness of the connection. The reliability of the board under several environmental test conditions has been confirmed so far, however, the board performance under bending stress was unclear. The realized board is still flexible and bendable to some extent, although the board has higher stiffness than standard flex board owing to its multi-layer structure. To confirm whether this feature affect on the board's performance or not, we have investigated the performance of the embedded board under the condition that the bending stress is applied to the die embedded die. The experimental results show no significant change due to the bending stress and the high durability against bending is confirmed.
Satoshi Okude, Group Mgr., Micro Device Department
Fujikura Limited
Sakura, Chiba 285-8550,

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