Here is the abstract you requested from the HiTEN_2011 technical program page. This is the original abstract submitted by the author. Any changes to the technical content of the final manuscript published by IMAPS or the presentation that is given during the event is done by the author, not IMAPS.
|High Temperature Latch-Up Immunity and Low Leakage Current Performance of High Density SRAMs Manufactured on Bulk Silicon|
|Keywords: latch-up immunity, leakage current, bulk silicon|
|Multiple high reliability or mission critical electronic market segments including oil and gas exploration and production, aerospace, automotive, medical devices, and energy generation rely on sophisticated electronics operating within high temperature environments. High temperature electronic applications require unique technical solutions and design considerations for survivability and for complying with other critical performance metrics such as low operating power budgets and latch-up immunity. SOI technology has long been viewed as the only solution offering latch-up immunity at elevated temperatures. However, one down side for SOI-based parts is their limited availability. We will report that high density CMOS SRAMs have been produced on bulk silicon using a modified CMOS process that hardens the junction isolation and has demonstrated latch-up immune performance at high temperatures up to 225 C˚. These process modifications result in significantly more robust CMOS circuits for highly reliable operation in extreme environments – such as radiation and high temperature. This unique capability to enhance existing IC products has also been demonstrated and would enable the quick conversion of commercial circuits (COTS) to hardened hi-rel commercial circuits with dramatically improved survivability. Specifically, we will present high temperature characterization data for two high-density bulk silicon CMOS SRAMs: a 16Mbit asynchronous SRAM manufactured at 180nm design node and an 8Mbit dual port synchronous SRAM manufactured at 130nm. Both of these parts were produced in a high volume, low-defect commercial CMOS fabrication facility in the USA. The SRAM parts were characterized to 225 C˚ and indicated both excellent static leakage and dynamic circuit performance at these elevated temperatures. Latch-up immunity testing at elevated temperature will also be presented.|
|David Duff, Director of Marketing
Silicon Space Technology