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Embedded Actives and Its Industry Effects
Keywords: embedded chip, embedded actives, SoP
Over the 60 to 70 year history of microelectronics packaging, electronic devices have been mounted onto an interconnect structure to form a microelectronics circuit. The devices could be either bare chips, CSPs or packaged components such as SMT or thru-hole carriers. The interconnect structures could be circuit boards, ceramic substrates or flex circuits. This methodology has enabled a clear divide between the fabrication, assembly and test of the semiconductor device, the fabrication and test of the interconnect structure and the assembly and test of the component/substrate assembly. Over the past decade a new packaging methodology, embedded actives components, has been developed that changes all of these industry norms. In an embedded actives packaging approach, one or more bare or packaged semiconductor devices are embedded within the interconnect structure. Although these approaches have significant electrical performance, size and cost benefits, the normal barriers between chip packaging, substrate fabrication and component assembly are removed. The interconnect structure is not completed prior to component embedding and the embedded component cannot be tested at packaged part level without the interconnect structure. This complicates electrical testing and makes it virtually impossible to differentiate between a defective component, a defective interconnect or a defective component to substrate contact. This paper will look at the history of embedded active developments and go into the various processes and structures being used. It will cover their electrical, reliability and size advantages and will address the revolutionary changes that the microelectronics industry must make to effectively utilize these technologies.
Ray Fillion, Principle Consultant
Fillion Consulting
Nikayuna, NY
USA


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