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Wafer Level Integration of MMIC and Microwave IPD with Metal/BCB Multilayer Interconnection Based on Low Resistance Silicon
Keywords: Wafer level MCM-D, Embedded MMIC, Integrated passive devices
A new high-density wafer-level integration of a GaAs based monolithic microwave integrated circuit (MMIC) chip and a microwave integrated passive device (IPD) is presented. This integration technology, an important and IC-compatible option for system-in-package (SiP), utilizes bulk Si fabrication and film deposition based multichip module (MCM-D) process. MMIC is entirely embedded into the silicon wafer while IPDs are integrated on the dielectric layers simultaneous with the metal/BCB multilayer interconnection. Key fabrication processes and crucial technologies are described in detail. Normal silicon wafer is selected as substrate because of its mature processing technology, low cost, good thermal dissipation as well as its thermal expansion matching with GaAs. To obtain excellent microwave performances and good planarization, thick photosensitive BCB of 25um/layer is adopted as dielectric and thus the use of tapered via that is hollow inside or filled by BCB is a cost-effective way to accomplish inter-layer connection instead of Au bump bonding or column used in dry-etch BCB process. Further promotions on microwave performances are achieved by the shielding effect through ground layer coverage on silicon surface and the application of microstrip line. Several experiments such as dc inter-layer connection resistance measurement and via geometry test are complemented to investigate the characteristic of Au/BCB interconnection. Microwave properties of the integration sample are measured by transmission performance test from 15GHz to 30GHz. The measurement results are analyzed and discussed comparing with the theoretical or simulation results.
Jiajie Tang, PhD Student
Shanghai Institute of Microsystem and Information Technology, CAS
Shanghai 200050,

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