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Molding Flow Modeling and Experimental Study on Void Control for Flip Chip Package Panel Molding with Moldable Underfill Technology
Keywords: molding, MUF, simulation
Increasing challenges are faced to ensure moldability with rapid advances in flip chip technology such as decreasing bump pitch and stand-off height, especially when commercial Moldable Underfill (MUF) is used and in particular, during panel level molding. One key challenge faced is severe void entrapment under the die. Experiments involving a large DOE matrix, which require significant time and process resources, are typically used to solve this issue. 3D flow modeling can be used to address these concerns. Simulation can be used to optimize the process to reduce defects without doing actual runs. Mold flow simulation can effectively reduce the design-to-implementation cycle time, identifying key problems before actual fabrication. In this paper, 3D mold flow simulation is applied to transfer molding to optimize design and process parameters. Cross Castro-Macosko model is used to define the MUF epoxy viscosity behaviors, where its rheological parameters were acquired using parallel plate rheometer and DSC(Differential Scanning Caloriemeter). 7.5mmx7.5mm flip chip package with bump height of 100um is used as the test vehicle. An actual full panel with the array of flip chip packages including the bumps would demand a large amount of elements and very high computational resources. Hence this paper proposes and verifies a systematic method that can save computational resources by using 2 steps analysis: simplified panel simulation and single package simulation. The initial step, simplified panel level simulation, is to optimize the process parameters to obtain balanced melt front. The second step is to study on the package level the effect of various package-scale parameters. This analysis provides a prediction of the void location and an insight on the appropriate parameters to minimize void problem. The actual voids location and size from the experiment was captured by SAT machine and short shots were obtained. For final validation, a complete panel-level flow model is built, where the process and design parameters adopted in the actual molding were implemented. The mold filling simulation showed good correlation with the experimental short shots and actual void location. Through this study, void issue is analyzed using 3D mold flow simulation. With optimized parameters from the simulation used as guidelines, experimental tests were conducted and the study showed that the simulation is a useful tool to optimize the molding process.
Jonathan Tamil,
United Test and Assembly Center Ltd.
Singapore 554916,
Singapore


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