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Integration of Piezoresistive Pressure Sensor with ASIC by Through Silicon Via (TSV) Technology
Keywords: pressure sensor, through silicon via, 3D integration
Traditionally wire bonding is used as the interconnects between pressure sensor and ASIC. However, wire bonding would obstruct miniaturization, sensor array fabrication and 3D integration. In this paper, the integration of a pressure sensor with ASIC with TSV is introduced. The 20μm-diameter through silicon via (TSV) is fabricated for electrical signal path from piezoresistive to processing circuits. SOI wafers with 15μm thick device layer were selected to fabricate piezoresistive structures for backside cavity ICP (induced coupled plasma) etching control and good piezoresistive membrane thickness distribution. After fabrication of front piezoresistors and circuits, TSV is formed with Alcatel DRIE (deep reactive ion etching) equipment, and coated with 500nm Si3N4 passivation and diffusion barrier layer. After this, sensor wafer is temporarily bonded with glass wafer, backside wafer thinning/polishing, bottom-up Cu electroplating to fill TSV, backside metallurgy, and cavity etching. And then pressure sensor chip (1mm*1mm) is flip chip bonded with ASIC using Cu-Sn-Cu eutectic bonding. Polymer hermetic sealing is used to maintain the pressure of sensor cavity. In this way, pressure sensor area could be largely reduced. Pressure sensor sensitivity is simulated with finite element analysis (FEA). Some important parameters of pressure sensor, such as resistance, sensitivity, full-scale output, nonlinearity, and leak current are tested. Then sensitivity of simulating and testing results are compared.
Tao Wang, Student
Tsinghua University
Beijing 100084,
China


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