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Simultaneous Characterization of Theta-JC and Theta-JB using Through-Package 1-D Heat Flow
Keywords: thermal resistance, junction-to-case, thermal transient test
Explosive growth in portable devices, triggered by the introduction of so-called smartphones, poses new thermal management challenges due to their ever-decreasing size and increasing power consumption. Precise knowledge on junction-to-case (theta-JC) and junction-to-board (theta-JB) thermal resistance of a package is essential in achieving optimal thermal management strategy for mobile devices, since those dictate efficiency of the package structure in dissipating IC power. Traditionally theta-JC and JB are separately measured using a specially designed cold plate setup to direct power dissipated from the chip to either package top surface or test board. In either case, significant heat loss to the undesirable direction is unavoidable and this hampers fast and accurate characterization of the thermal resistances. We circumvent those difficulties by employing new experimental setup that can create one-dimensional heat flow from the package bottom to the top. Instead of heating the chip, we directly heat up the test board area underneath the package using a resistive heater patterned over the package mounting area of the test board. One-dimensional heat conduction is then established from the test board to the package top surface, connecting junction-to-board and junction-to-case thermal resistance in serial. Temperature rise at the board is monitored from the change in heater electrical resistance, while the junction temperature is measured from on-chip temperature sensor. To further minimize thermal loss, entire test setup is kept inside a vacuum chamber. Theta-JC and theta-JB are then simultaneously determined by dividing the respective temperature differences by power input to the heater. We first validate our approach by characterizing the theta-JC and JB of a flip-chip package and comparing them with the conventional measurements. Since our approach is especially well-suited for thermal transient measurement technique based on 1-D thermal RC network model, we further demonstrate capability of our approach by performing transient test to precisely characterize internal thermal resistances of the package.
Jichul Kim, Senior Engineer
Samsung Electronics
Yongin-City, Gyeonggi-Do 446-711,
Korea


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