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Thin Wafer Handling Technologies for 300mm Wafer in 3D IC Integration
Keywords: Thin-wafer handling, 3D IC integration, Bonding and De-Bonding
Thin-wafer handling is one of the key enabling technologies for 3D IC integration. Usually the device wafer is temporarily bonded on a supporting wafer with an adhesive and thinned down to the required thickness to expose the tip of the through silicon vias (TSVs). Then, the composite wafers go through all the semiconductor fabrication and packaging assembly processes. Finally, the thin-device wafer is de-bonded from the supporting wafer. Adhesive is the key enabling material for thin-wafer handling, which should be able to withstand high process temperatures (after temporary bonding), dissolve and clean-up easily (during de-bonding), and leave no residual and chipping on the device wafer (after de-bonding). Thin-wafer handling is especially difficult for larger wafers such as the 300mm wafer. In this study, 300mm test wafers have been used to evaluate three different thin-wafer handling adhesives (Material A, Material B, and Material C) under two different boundary conditions (one is the 300mm bare test wafer and the other is the 300mm test wafer with 80μm solder bumps). After temporary bonding, both sets of wafers have been grinded down to 50μm. Total thickness variation (TTV), before and after thinning, is used to confirm the thickness uniformity and determine the thickness variation by both contact gauge and IR (infrared) measurement. Then, both sets of wafers went through all the semiconductor fabrication and packaging assembly processes. Finally, the supporting wafer is de-bonded from both sets of test wafers. Again, the TTV of both test wafers with adhesive Materials A, B, and C have been measured and compared. Because of its material properties and de-bonding method, chipping occurred in Material C. For the test wafer with 80μm solder bumps, in addition to TTV, the surface conditions and bump characteristics have been examined for these three adhesives. Finally, based on the current investigation, a set of process guidelines for the temporary bonding and de-bonding of the supporting wafer and the solder-bumped wafer has been recommended.
H. H. Chang, Engineer
ITRI
Hsinchu, Taiwan 310,
R.O.C.


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