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3D Packages and Assembly Methodologies
Keywords: 3D package, assembly, substrate design
Package on package solutions represent the 2nd generation of 3D integration with stacked die in package representing the 1st generation. The concept is rather simple: a die is packaged on a substrate with I/O pads on top and bottom to form the bottom package. The top package is a standard PBGA package with matching I/O pad locations and can therefore be assembled to the bottom package. The driving force for this approach was purely the business model of the cell phone industry, allowing to switch top packages for economic, supply or capability reasons at the board assembly stage. Business simplicity did however not match up with technical reality. It was the first time that board assemblers had to stack and reflow packages. The yield loss due to opens was significant because flatness at reflow temperatures was not maintained. The traditional specifications only address warpage at room temperature. Solutions were developed on several levels: substrate materials, mold compounds and vias therein, etc. Here, we will describe the different solutions as well as modeling data to guide in the substrate/package design. Also we will describe the multitude of package variants that have been conceived.
Bernd K. Appelt, Director of Business Development
ASE Group
Sunnyvale, CA
USA


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