Here is the abstract you requested from the IMAPS_2011 technical program page. This is the original abstract submitted by the author. Any changes to the technical content of the final manuscript published by IMAPS or the presentation that is given during the event is done by the author, not IMAPS.
|An Innovative Printed Circuit Board Power Delivery Scheme|
|Keywords: transient power noise, PDN (power distribution network), PCB (printed circuit board)|
|With the speed of ASIC core logic getting faster, the current consumption getting larger, and the using of clock gating power reduction techniques, the core transient power noise is getting larger. Since different power rails may have different current consumptions and consequently have different power noise, the power rails even with the same value are usually isolated to each other on die and package so that the noises are not coupled among the power rails. At the mean time, in order to save cost, on system board usually only one VRM (voltage regulator module) is used for the core power rails that have the same value, and only one board power plane is used to connect VRM to BGA (ball grid array) balls of those core power rails. In this situation, larger die power noise can be propagated to other power rails that share one power plane and cause issues, if they don't have sufficient on die capacitance. If this happens, splitting board power plane with two separate VRMs are usually used so that the larger power noise can't be propagated to the power rail that has less on die capacitors. But doing this will increase cost. In this paper, besides the above two on board power delivery schemes (one combined power plane with one VRM, and two split power planes with two VRMs), an innovative one, with two split power planes merging at VRM and sharing one VRM, (like U shape) has been investigated and found to be cost effective and have good performance for some applications by using transient power noise simulation and analysis.|
Cisco Systems, Inc.
San Jose, CA