Micross

Abstract Preview

Here is the abstract you requested from the IMAPS_2011 technical program page. This is the original abstract submitted by the author. Any changes to the technical content of the final manuscript published by IMAPS or the presentation that is given during the event is done by the author, not IMAPS.

Bond Over Active Circuitry Design for Reliability
Keywords: BOAC (bond over active circuitry), bond pad reliability, Cu wire bond
This paper introduces layout design rules for successful Cu wire bond-over-active-circuitry (BOAC) in 0.18 micron and other IC technologies having Al metallization interconnects (two-level metal and up) in SiO2 dielectric, with W vias. The resulting bond pad structures effectively address BOAC pad reliability concerns, permitting Au or Cu wire bonding on relatively thin top metal. Cu wire bond is attractive on BOAC designs for lower cost than Au wire, while improving the thermal capability of the product. But Cu wire bond has presented even more challenges than Au wire bond due to higher stress to the pads during bonding, typically leading to increases in underlying films deformation and cracking. The new BOAC pad layout rules are based on the physical thin films principles, substantiated and refined through analysis of a large volume of experimental and product qualification data in various IC technologies. Interconnect layout beneath pads which follows the BOAC design rules creates more robust bond pad structures, preventing Al films deformation while strengthening the dielectric against cracking, and permitting free-form Si device design beneath. Substantial freedom in interconnect design is permitted in all metal layers beneath the pad, but the rules for top via and top-metal-minus-one layers are more restrictive than the rest. The BOAC design rules do not require any changes in wafer processing, they do not prevent the adding of redistribution or other layers for solder bumping or the like, but they do enable smaller die size and less expensive wire bond without jeopardizing bonding reliability.
Stevan G. Hunter, Principal Reliability Engineer
ON Semiconductor
Pocatello, Idaho
USA


CORPORATE PREMIER MEMBERS
  • Amkor
  • ASE
  • Canon
  • EMD Performance Materials
  • Honeywell
  • Indium
  • Kester
  • Kyocera America
  • Master Bond
  • Micro Systems Technologies
  • MRSI
  • NGK NTK
  • Palomar
  • Plexus
  • Promex
  • Qualcomm
  • Quik-Pak
  • Raytheon
  • Specialty Coating Systems