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|Copper Plated TSVs in Silicon Wafers Using a Novel Process|
|Keywords: TSV, Packaging, MEMS|
|The Through Silicon Via (TSV) is thought to be the superior next generation 3-D chip stacking technology for electronic devices. Currently, copper based TSVs are the most cost effective mass producible TSVs. Copper based TSVs were produced in this work using a unique process that is potentially compatible with post-microelectronic manufacturing. Using 100mm diameter, 350m thick silicon wafers, 100um diameter circular holes were dry etched through the entire depth of the wafer. The wafers were then thermally oxidized, producing 6000Å of silicon dioxide to prevent electrical contact between the copper TSVs and the silicon substrate. After oxidation, the TSV wafer was placed on the copper seed layer side of a backing wafer. The backing wafer was developed by spinning photoresist (1~2um thick) on the wafer's surface and depositing the copper seed layer on the photoresist layer, which allowed for quick and effective later separation of the seed layer from the backing wafer. The seed layer was composed of a 500Å chrome adhesion layer and a 2,000Å copper layer, both deposited by electron beam evaporation. With the TSV wafer in contact with the backing wafer's copper seed layer, a 25mm piece of copper tape was placed in contact with the copper seed layer surface. The conductive tape was used as the electrical connection to the seed layer on the backing wafer. With the tape in place, the wafers were sealed using a UV removable adhesive tape. Openings were cut in the tape to expose the vias in the TSV wafer. The assembly was then placed in a copper sulfate based electroplating bath to fill the TSVs with copper, which grew from the backing wafer's seed copper. The backing wafer was then separated from the TSV wafer. The fabricated TSVs were cross-sectioned for analysis, which revealed successful formation of solid copper TSVs.|
|Emir Adanur, Graduate Research Assistant