Here is the abstract you requested from the MMC_2011 technical program page. This is the original abstract submitted by the author. Any changes to the technical content of the final manuscript published by IMAPS or the presentation that is given during the event is done by the author, not IMAPS.
|Embedded Chip Power Packaging|
|Keywords: power packaging, embedded chip packaging, power electronics|
|Power electronics are generally packaged in one of two approaches; single chip packages or bare chip hybrid packaging. Power devices are characterized by high voltage, high current, high power dissipation and only two or three unique I/O connections. The two terminal devices are diodes and the three terminal devices are transistors. They can have 10's to 1000's of volts and 10's to 100's of amps and dissipate 10's to 100's of watts. Virtually all power devices are interconnected to a package or a power substrate with multiple, large gauge wire bonds or ribbon bonds. As advances have been made in power semiconductor technology, devices must withstand higher voltages, currents, power dissipation and switching frequencies. Wire bonded packaging approaches are the major limitation to power circuit operation. Embedded chip packaging approaches have made great strides in the past decade in addressing the packaging and interconnection of devices in portable applications. More than 50 companies and research institutions have developed a spectrum of approaches to packaging bare chips within the board, substrate or interconnect structure. These are targeting low power, low voltage devices such as those that go into cellular phones, PDAs, PC, digital cameras and hundreds of other products. There are a number of organizations that are looking into applying embedded chip technology to package power circuits with power devices with 10's to 100's of watts dissipation per device. These changes include moving from 25 micron to 1000 micron via diameters, going from 4 micron to 100 micron thick copper metallization, and going from topside TIM attached heat sinks to bottom side soldered thermal spreaders/heatsinks. This paper will detail the design, material and feature size changes that must be done in order to move the low power embedded chip approaches into the high power arena. Various embedded chip power circuit examples from GE and Virginia Tech will be detailed.|
|Ray Fillion, Consultant