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Full-Wave EM Simulation of High-Speed IC/Package Designs
Keywords: package, electromagnetic simulation, signal integrity
Nowadays high-speed IC/package design methodologies require thorough power and signal integrity (PI/SI) analysis using full-wave 3D electromagnetic (EM) simulation technology. With RF and analog content, design engineers simulate ICs in context of package parasitics. The ability to use a repeatable flow throughout the design cycle is a key requirement to meet tightly managed product schedules. This can be accomplished by an integrated flow that combines full-wave solver technology with IC/package design, analysis and simulation. This proposed workflow presents a full-wave 3D EM signal integrity simulation of a complex package design imported from an EDA layout tool using a Finite Integration Technique (FIT) based solver. Standard outputs like S-parameters and Time Doman Reflection (TDR) will be generated along with the RLC network circuit extraction and the full 3D-field visualization. The advantages of the FIT methodology for such IC/package SI applications and the use of advanced high performance computing (HPC) will be highlighted. In addition the impact of the boundary conditions and the effect of truncating the package on the accuracy of the simulation results will also be shown and general simulation guidelines for high-speed PCB/package designs will be presented. Finally, the integrated design flow will be completed by showing the back annotation of the full-wave 3D EM simulation results of the package back into the circuit simulator in order to generate eye diagrams and other generic figure of merits.
Darryl Kostka, Application Engineer
CST of America
San Mateo, CA
USA


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