Here is the abstract you requested from the SysPack_2011 technical program page. This is the original abstract submitted by the author. Any changes to the technical content of the final manuscript published by IMAPS or the presentation that is given during the event is done by the author, not IMAPS.
|Advanced High Density Interconnection PCBFor Mobile System Platform Application|
|Keywords: High Density Interconnection PCB, Mobile System Platform Application, Electrical Simulation and Measurement|
|The faster market trend towards smart phones with more advanced computing ability and connectivity will drive the greater need to incorporate more functionality in smaller space by integrating more components and functional blocks into convergent systems in form of chip-level (SOC) or die-level (SIP) packaging. As feature size continues to shrink, it requires combination of stringent design requirements which all interact in order to achieve the desired performance. Also, various limitations will arise in the design of the PCB in terms of size and signal integrity. The PCB plays critical role in the miniaturization of the overall system and the final application's electrical performance. Given the extreme routing requirement of each component package with high I/O pins and fine pitch area array, the conventional HDI PCB pose some design challenges and limitations. In order to increase the routing density, it often requires smaller trace width and micro via diameter and even the need of adding more metal layers. These, however, will dramatically increase the cost and more reliability risk is expected. In this paper, we present a new generation PCB that could meet the mobile platform requirement by proposing an advanced ultra fine metal resolution PCB. It will demonstrate its high density interconnect capability in a basic 4-layer stack-up structure. One of its advanced features is the ability to adjust board and interconnection impedance in order to optimize signal integrity and more routing capability for dense mobile platform layouts. It will also demonstrate that a low CTE organic-based fiber glass core may also achieve tighter routing density using limited number of metal layers at smaller and thinner form factor while maintaining the desired signal integrity performance as compared to conventional 10-layer HDI PCBs. Details of electrical simulation and measurement of electrical parameters are also presented and discussed.|
Samsung Electromechanics Co., Ltd.