Here is the abstract you requested from the DPC_2012 technical program page. This is the original abstract submitted by the author. Any changes to the technical content of the final manuscript published by IMAPS or the presentation that is given during the event is done by the author, not IMAPS.
|2.5D and 3D Packaging Enables Effective Multi-Chip Packaging|
|Keywords: 3D packaging, 2.5D interposers, Multichip|
|3D and 2.5D packaging has been heralded as a set of the best package architectures to satisfy shrinking time to market windows while offering an effective way to combine the ever increasing set of circuits needed for today's popular products. There is significant confusion as to the design guidelines and the economics involved to create a 3D (stacked) or a 2.5D (stacked on interposer) package. The numbers vary widely depending on the sources and the designs utilized. This paper will examine the relative cost, design, and performance trade-offs from actual production practice. Comparisons of designs using different via types, various substrate options and BEOL vs. FEOL RDL trace layers. It will show the economics of using 3D and 2.5D for a number of the more common applications in cell phones, tablets and other products.|
|Phil Marcoux, Consultant
Sunnyvale , CA