Here is the abstract you requested from the DPC_2012 technical program page. This is the original abstract submitted by the author. Any changes to the technical content of the final manuscript published by IMAPS or the presentation that is given during the event is done by the author, not IMAPS.
|Comparison of Temporary Wafer Bonding Materials and Processes|
|Keywords: Temporary wafer bonding, Thinned wafers, Silicon interposer|
|Temporary wafer bonding has been used for many years to provide mechanical support to device wafers during thinning processes. However, the advent of 2.5D and 3D integration is placing significantly higher demands on the performance of temporary bonding materials as more fabrication processes are required on progressively thinner wafers. In response, materials providers have recently developed several different types of temporary bonding solutions that seek to provide a robust carrier with a simple debond process. Typical 2.5D or 3D integration process flows will require more types of processes than just backgrinding and CMP to be done on the backside of thinned wafers. RIE, PECVD oxide deposition, lithography, and electroplating are some of the process steps that will be needed to complete the TSV interconnects. Each of these steps, and the order in which they are done, will impose certain requirements on the temporary bond material. This presentation will examine the different categories of available temporary wafer bonding solutions with regard to their bonding and debonding methods as well as their resistance to and compatibility with various BEOL processing steps. In addition, ongoing work at RTI to evaluate temporary bond materials for silicon interposer and 3D-IC applications will be presented. This work has been focusing on the interaction between these materials and the processing requirements of several photoimageable dielectrics.|
|Matthew Lueck, Research Engineer
Research Triangle Park, NC