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A High Temp Standalone 4MByte Flash Memory with SPI Interface for 210C Applications
Keywords: Downhole, Flash, Storage
This paper covers the internal architecture, testability & performance characterization of Texas Instruments' High-Temp 210C 4MByte standalone Flash storage device. It will be available in a 14-pin ceramic dual Flat pack package as well as a Known Good Die (KGD) option. The device is manufactured in TI's 180nm 1.8V Flash process with 3.3V IOs. The design implements 8 banks organized into 2M x 16 bits surrounded by a flash wrapper. The wrapper interfaces with the flash state machine which is clocked by FCLK, and the flash charge pump to access & operate the flash to program, read, verify, erase, compact etc. Communications to and from the flash controller is achieved with an asynchronous SPI controller. The SPI controller is responsible for translating and executing the high level SPI protocol commands to the internal flash controller & its registers. A protocol was developed to access the flash array via the SPI. The protocol is flexible, and supports various commands and configuration capabilities. Testability of critical parameters for reliable 210C flash operation is ensured with the implementation of an internal test port accessible through a parallel interface (for TI Internal use only). The test port, and a SPI initiated BIST controller are used to provide full & comprehensive characterization of the Flash bit cell array, as well as the flash-pump across temperature & frequencies. The form factor, size, and pin out of this flash device is primarily focused on data logging for narrow & space limited extreme harsh environments such as the down-hole drilling industry.
Wade VonBergen, Applications Engineer
Texas Instruments
Dallas, TX
USA


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