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Etching Shapes on Characteristic Impedance and Crosstalk
Keywords: Etching, PWB, Process
Signal integrity becomes more important when the length of the PCB traces surpasses 1/10 lambda where lambda denotes the wavelength. For fast digital communication purpose and low energy consumption in CMOS technology, faster rise time of the clock has been always preferable, which means higher harmonic frequency. In this case, the importance of considering signal integrity gets a higher priority as issues such reflections and crosstalks between adjacent traces cannot be omitted especially in dense PCBs. Several factors control the effect of reflections and the crosstalk such as the shape and dimension of the traces, the isolator characteristics which is inserted between the trace and the ground plane, the nearness and the geometry of the nearby conductors. In other words, these factors control the characteristic impedance of the traces and the mutual inductances and capacitances between the adjacent traces. Although these factors have been taken into account during the design phase for good signal integrity, the manufacturing process, which differs from vendor to vendor, has a great effect on the above factors. PWB manufacturing process may result in many different variations, which involve the dielectric constant, the thickness of the insulator, the trace width and the copper foil thickness. In addition to these variations, the etching quality that falls in three different categories flat, trapezoidal with variations in the angle and rounded with variations in the depth. In this paper we present the effect of these three different etching shapes on the characteristic impedance and the crosstalk of two edge-coupled microstrip lines. On the other hand it is concluded that one could reduce the crosstalk in a dense PCB if a flat etching process is available, by adjusting the width of the traces of the flat etching in such way the same characteristic impedance is achieved as the one we get from the trapezoidal and the rounded etchings while keeping the same center to center spacing. This adjustment is motivated by knowing that the matching is always possible by adding extra resistors at the terminations. The preliminarily results of a case study of two edge-coupled microstrip lines, each 100 um wide, 18 um thick and a 0.5 mm thick dielectric with a dielectric constant of 4.5, the centers are spaced by 120 um. This has resulted in a crosstalk reduction of 30 % when moving from the trapezoidal etching to the flat etching while keeping the same characteristic impedance and distance between the centers of the microstrip lines.
Abdelghani Renbi, PhD Student
Lulea University of Technology
Lulea, Lulea
Sweden


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