Here is the abstract you requested from the IMAPS_2012 technical program page. This is the original abstract submitted by the author. Any changes to the technical content of the final manuscript published by IMAPS or the presentation that is given during the event is done by the author, not IMAPS.
|Embedded Die Substrates for Power Applications|
|Keywords: embedded die, power applications, MOSFET|
|Traditionally paower die like MOSFETs have been packaged on lead frames using wir bond interconects. To facilitate current carrying requirements thick wires were used and sometimes also clips to handle the total power and thermal conductivity needs. As die have been thinned, it has become possible to take advantage of new elctrical designs and locate source and drain on opposite sides of the die. Such die are easily packaged in embedded die substrates. The die is bonded on a Cu pad and covered by prepreg and copper foil during lamination. Source, drain and gate pads are accessed from the top side with laser vias and filled with plated copper. Finally, the top side is patterned and protected with solder mask. An examplary process flow will be described as well as different options for die bonding. Electrical and thermal modeling data will be presented as well. Aside from single die packages, more advanced packages can be built containing multiple power die and controller die can be built with the same process albeit a more complex corss-section may be required.|
|Bernd K Appelt, Dir WW Business Development