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3D Electromagnetic Modeling of Through Silicon Vias and Interposers in Electronic Packaging
Keywords: TSV, interposer, electromagnetics
Over the past decade, the trend in the consumer electronics industry has been to develop high performance multi-functional products with a compact size and reduced cost. Modern systems demand new technologies that can integrate RF, analog, digital and sensor functionalities while maintaining minimal interference among the different systems. Multi-functional integration can be achieved by means of 3D IC technology and by stacking multiple chips. 3D ICs promise “more than Moore” integration by packing a lot of functionality into small form factors. The 3D IC technology requires chip to chip interposers as well as though silicon vias (TSVs). The goal of this paper is to model the electrical behavior of TSVs and 3D interposers by means of three dimensional (3D) full-wave electromagnetic simulations and to provide a comprehensive and systematic analysis of various configurations. Silicon interposers suffer from high substrate losses and enhanced coupling between TSVs owing to the finite conductivity of Silicon. This issue is exacerbated in the case of high density TSV interposers. This paper therefore presents a comparative analysis of signal delivery networks in 3D interposers for high-speed signal transmission with a focus on the above mentioned issues. Comprehensive signal integrity and EMC simulations are performed numerically and design guidelines are provided in order for designers to minimize the crosstalk among TSVs, improve the signal quality and optimize the performance of interconnections in 3D interposers.
Darryl Kostka,
CST of America
San Mateo, CA

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